The Kane paradigm of donor nuclear spin quantum computing in silicon [1] based on single atom placement fabrication techniques, [2,3] is an important realisation of Feynman's original concept of nanotechnology in the solid state. Variations on this theme include electron spin qubits [4-6] and charge qubits [7]. There are also possible realisations for quantum computers being investigated in Ion trap QCCD technologies [14], and GaAs 2e (S-T) qubits [15].
Quantum computers are susceptible to error modes that do not trouble binary digital computers. For instance, gating errors and decoherence errors. Fault-tolerance scale-up requires quantum error correction over concatenated logical qubits with all the attendant ancillas, syndrome measurements and classical feed-forward processing. Both parallelism and communication must be optimized [8]. In general error correction is known to involve the steps of encoding data bits, ancilla syndrome determination and correction, and decoding the error corrected data qubits.